# 0 "/mnt/Rogue/Projects/Vivado/ES2025/Labs/lab8_bsp/hw/sdt/system-top.dts"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "/mnt/Rogue/Projects/Vivado/ES2025/Labs/lab8_bsp/hw/sdt/system-top.dts"
/dts-v1/;
# 1 "/mnt/Rogue/Projects/Vivado/ES2025/Labs/lab8_bsp/hw/sdt/pl.dtsi" 1
/ {
 cpus_microblaze_0: cpus_microblaze@0 {
  #cpu-mask-cells = <1>;
  compatible = "cpus,cluster";
  #address-cells = <1>;
  #size-cells = <0>;
  microblaze_0: cpu@0 {
   xlnx,reset-msr-dce = <0>;
   model = "microblaze,11.0";
   xlnx,addr-tag-bits = <0>;
   xlnx,d-axi = <1>;
   xlnx,interrupt-mon = <0>;
   xlnx,iaddr-size = <32>;
   xlnx,number-of-wr-addr-brk = <0>;
   xlnx,dynamic-bus-sizing = <0>;
   xlnx,temporal-depth = <0>;
   xlnx,use-interrupt = <1>;
   xlnx,optimization = <0>;
   xlnx,ip-axi-mon = <0>;
   xlnx,ip-name = "microblaze";
   d-cache-highaddr = <0x3fffffff>;
   xlnx,dcache-force-tag-lutram = <0>;
   xlnx,pc-width = <32>;
   xlnx,interrupt-is-edge = <0>;
   reg = <0x0>;
   xlnx,async-interrupt = <1>;
   xlnx,use-mmu = <0>;
   xlnx,reset-msr-ee = <0>;
   xlnx,icache-victims = <0>;
   xlnx,use-reorder-instr = <0>;
   xlnx,d-lmb-mon = <0>;
   xlnx,d-lmb-protocol = <0>;
   xlnx,ill-opcode-exception = <0>;
   xlnx,dcache-always-used = <1>;
   xlnx,use-div = <0>;
   xlnx,dc-axi-mon = <0>;
   xlnx,debug-trace-async-reset = <0>;
   xlnx,trace = <0>;
   xlnx,part = "xc7a100tcsg324-1";
   i-cache-baseaddr = <0x0>;
   xlnx,use-config-reset = <0>;
   xlnx,pvr = <0>;
   xlnx,i-lmb-mon = <0>;
   xlnx,dcache-byte-size = <4096>;
   xlnx,fault-tolerant = <0>;
   xlnx,family = "artix7";
   compatible = "xlnx,microblaze-11.0" , "xlnx,microblaze";
   xlnx,data-size = <32>;
   xlnx,mmu-zones = <2>;
   xlnx,debug-trace-size = <8192>;
   xlnx,mmu-privileged-instr = <0>;
   xlnx,enable-discrete-ports = <0>;
   d-cache-line-size = <16>;
   xlnx,d-lmb = <1>;
   xlnx,sco = <0>;
   xlnx,reset-msr-eip = <0>;
   xlnx,debug-interface = <0>;
   clock-frequency = <81247969>;
   xlnx,use-ext-brk = <0>;
   xlnx,daddr-size = <32>;
   xlnx,debug-enabled = <1>;
   xlnx,reset-msr-ice = <0>;
   xlnx,num-sync-ff-dbg-trace-clk = <2>;
   xlnx,i-lmb-protocol = <0>;
   xlnx,endianness = <1>;
   xlnx,fsl-exception = <0>;
   i-cache-line-size = <16>;
   xlnx,use-extended-fsl-instr = <0>;
   xlnx,reset-msr = <0x0>;
   xlnx,dp-axi-mon = <0>;
   device_type = "cpu";
   xlnx,branch-target-cache-size = <0>;
   xlnx,dcache-use-writeback = <0>;
   xlnx,div-zero-exception = <0>;
   xlnx,mmu-tlb-access = <3>;
   bus-handle = <&amba_pl>;
   xlnx,cache-byte-size = <4096>;
   xlnx,pvr-user2 = <0x0>;
   xlnx,opcode-0x0-illegal = <0>;
   xlnx,icache-line-len = <4>;
   xlnx,ecc-use-ce-exception = <0>;
   xlnx,base-vectors = <0x0>;
   xlnx,edk-special = "microblaze";
   xlnx,use-dcache = <0>;
   xlnx,use-barrel = <1>;
   xlnx,reset-msr-bip = <0>;
   xlnx,allow-dcache-wr = <1>;
   xlnx,debug-external-trace = <0>;
   xlnx,addr-size = <32>;
   xlnx,piaddr-size = <32>;
   i-cache-highaddr = <0x3fffffff>;
   xlnx,num-sync-ff-clk-debug = <2>;
   xlnx,debug-event-counters = <5>;
   xlnx,fpu-exception = <0>;
   xlnx,allow-icache-wr = <1>;
   xlnx,g-use-exceptions = <1>;
   xlnx,i-axi = <1>;
   xlnx,g-template-list = <8>;
   xlnx,icache-streams = <0>;
   xlnx,dcache-line-len = <4>;
   xlnx,num-sync-ff-clk = <2>;
   xlnx,edk-iptype = "PROCESSOR";
   xlnx,use-stack-protection = <0>;
   xlnx,use-hw-mul = <1>;
   xlnx,num-sync-ff-dbg-clk = <1>;
   xlnx,interconnect = <2>;
   xlnx,debug-latency-counters = <1>;
   i-cache-size = <4096>;
   xlnx,exceptions-in-delay-slots = <1>;
   xlnx,use-fpu = <0>;
   xlnx,reset-msr-ie = <0>;
   xlnx,edge-is-positive = <1>;
   xlnx,use-pcmp-instr = <1>;
   xlnx,use-icache = <0>;
   d-cache-size = <4096>;
   xlnx,memory-ip-list = "microblaze_0_local_memory_ilmb_bram_if_cntlr_memory" , "microblaze_0_local_memory_dlmb_bram_if_cntlr_memory" , "mig_7series_0_memory" , "mig_7series_0_memory";
   xlnx,async-wakeup = <3>;
   xlnx,use-non-secure = <0>;
   xlnx,dcache-addr-tag = <0>;
   xlnx,number-of-rd-addr-brk = <0>;
   d-cache-baseaddr = <0x0>;
   xlnx,area-optimized = <1>;
   xlnx,avoid-primitives = <0>;
   xlnx,lockstep-slave = <0>;
   xlnx,use-ext-nm-brk = <0>;
   xlnx,instr-size = <32>;
   interrupt-handle = <&axi_intc_0>;
   xlnx,icache-always-used = <1>;
   xlnx,i-lmb = <1>;
   xlnx,mmu-dtlb-size = <2>;
   xlnx,lockstep-select = <0>;
   xlnx,lmb-data-size = <32>;
   xlnx,ic-axi-mon = <0>;
   xlnx,enable-conversion = <0>;
   xlnx,num-sync-ff-clk-irq = <1>;
   xlnx,fsl-links = <0>;
   timebase-frequency = <81247969>;
   xlnx,icache-force-tag-lutram = <0>;
   xlnx,dcache-data-width = <0>;
   xlnx,dcache-victims = <0>;
   xlnx,use-branch-target-cache = <0>;
   xlnx,debug-profile-size = <0>;
   xlnx,unaligned-exceptions = <0>;
   xlnx,lockstep-master = <0>;
   xlnx,freq = <81247969>;
   xlnx,number-of-pc-brk = <1>;
   xlnx,mmu-itlb-size = <1>;
   xlnx,imprecise-exceptions = <0>;
   xlnx,use-msr-instr = <1>;
   xlnx,icache-data-width = <0>;
   xlnx,debug-counter-width = <32>;
  };
 };
 clock: clocks {
  #address-cells = <1>;
  #size-cells = <0>;
  clk_cpu_0: clk_cpu@0 {
   compatible = "fixed-clock";
   reg = <0>;
   clock-frequency = <81247969>;
   clock-output-names = "clk_cpu";
   #clock-cells = <0>;
  };
  clk_bus_0: clk_bus_0@1 {
   compatible = "fixed-clock";
   reg = <1>;
   clock-frequency = <81247969>;
   clock-output-names = "clk_bus_0";
   #clock-cells = <0>;
  };
 };
 amba_pl: amba_pl {
  ranges;
  compatible = "simple-bus";
  #address-cells = <1>;
  #size-cells = <1>;
  axi_intc_0: interrupt-controller@41200000 {
   #interrupt-cells = <2>;
   xlnx,sense-of-irq-edge-type = "Rising";
   xlnx,edk-special = "INTR_CTRL";
   xlnx,kind-of-intr = <0x1>;
   xlnx,kind-of-edge = <0xffffffff>;
   xlnx,irq-is-level = <1>;
   xlnx,has-ivr = <1>;
   compatible = "xlnx,axi-intc-4.1" , "xlnx,xps-intc-1.00.a";
   xlnx,disable-synchronizers = <0>;
   xlnx,kind-of-lvl = <0xffffffff>;
   xlnx,ivar-reset-value = <0x10>;
   xlnx,irq-active = <0x1>;
   xlnx,en-cascade-mode = <0>;
   xlnx,ip-name = "axi_intc";
   xlnx,has-ilr = <0>;
   reg = <0x41200000 0x10000>;
   xlnx,addr-width = <0x20>;
   xlnx,s-axi-aclk-freq-mhz = <0x4d7bee1>;
   xlnx,num-sw-intr = <0>;
   xlnx,irq-connection = <0>;
   xlnx,num-intr-inputs = <0x4>;
   xlnx,has-sie = <1>;
   xlnx,enable-async = <0>;
   xlnx,has-cie = <1>;
   xlnx,num-sync-ff = <2>;
   xlnx,edk-iptype = "PERIPHERAL";
   xlnx,mb-clk-not-connected = <1>;
   xlnx,has-ipr = <1>;
   xlnx,sense-of-irq-level-type = "Active_High";
   xlnx,cascade-master = <0>;
   xlnx,processor-clk-freq-mhz = <0x4d7bee1>;
   status = "okay";
   xlnx,is-fast = <0x0>;
   xlnx,has-fast = <0>;
   xlnx,ivar-rst-val = <0x10>;
   interrupt-controller;
   xlnx,async-intr = <0xffffffff>;
   xlnx,name = "axi_intc_0";
  };
  Pmod_DHB1_0: Pmod_DHB1@44a00000 {
   compatible = "xlnx,Pmod-DHB1-1.0";
   xlnx,s-axi-gpio-data-width = <32>;
   xlnx,s-axi-motor-fb-addr-width = <5>;
   xlnx,ip-name = "Pmod_DHB1";
   reg = <0x44a00000 0x10000 0x44a10000 0x10000 0x44a20000 0x10000>;
   xlnx,s-axi-pwm-addr-width = <7>;
   xlnx,s-axi-motor-fb-data-width = <32>;
   xlnx,s-axi-gpio-addr-width = <4>;
   xlnx,edk-iptype = "PERIPHERAL";
   status = "okay";
   xlnx,s-axi-pwm-data-width = <32>;
   xlnx,name = "Pmod_DHB1_0";
  };
  Pmod_Dual_MAXSONAR_0: Pmod_Dual_MAXSONAR@44a30000 {
   compatible = "xlnx,Pmod-Dual-MAXSONAR-1.0";
   status = "okay";
   xlnx,ip-name = "Pmod_Dual_MAXSONAR";
   xlnx,edk-iptype = "PERIPHERAL";
   reg = <0x44a30000 0x10000>;
   xlnx,name = "Pmod_Dual_MAXSONAR_0";
  };
  axi_gpio_0: gpio@40000000 {
   #interrupt-cells = <2>;
   interrupts = < 2 2 >;
   xlnx,gpio-board-interface = "led_4bits";
   compatible = "xlnx,axi-gpio-2.0" , "xlnx,xps-gpio-1.00.a";
   xlnx,all-outputs = <1>;
   #gpio-cells = <2>;
   xlnx,gpio-width = <4>;
   clock-frequency = <81247969>;
   interrupt-parent = <&axi_intc_0>;
   xlnx,dout-default = <0x0>;
   xlnx,is-dual = <1>;
   xlnx,ip-name = "axi_gpio";
   xlnx,tri-default-2 = <0xffffffff>;
   reg = <0x40000000 0x10000>;
   xlnx,all-inputs-2 = <1>;
   clocks = <&clk_bus_0>;
   xlnx,all-outputs-2 = <0>;
   gpio-controller;
   xlnx,interrupt-present = <1>;
   xlnx,gpio2-board-interface = "push_buttons_4bits";
   xlnx,edk-iptype = "PERIPHERAL";
   xlnx,dout-default-2 = <0x0>;
   status = "okay";
   xlnx,gpio2-width = <4>;
   clock-names = "s_axi_aclk";
   xlnx,use-board-flow;
   interrupt-controller;
   interrupt-names = "ip2intc_irpt";
   xlnx,tri-default = <0xffffffff>;
   xlnx,name = "axi_gpio_0";
   xlnx,all-inputs = <0>;
  };
  axi_gpio_1: gpio@40010000 {
   xlnx,gpio-board-interface = "rgb_led";
   compatible = "xlnx,axi-gpio-2.0" , "xlnx,xps-gpio-1.00.a";
   xlnx,all-outputs = <1>;
   #gpio-cells = <2>;
   xlnx,gpio-width = <12>;
   clock-frequency = <81247969>;
   xlnx,dout-default = <0x0>;
   xlnx,is-dual = <1>;
   xlnx,ip-name = "axi_gpio";
   xlnx,tri-default-2 = <0xffffffff>;
   reg = <0x40010000 0x10000>;
   xlnx,all-inputs-2 = <1>;
   clocks = <&clk_bus_0>;
   xlnx,all-outputs-2 = <0>;
   gpio-controller;
   xlnx,interrupt-present = <0>;
   xlnx,gpio2-board-interface = "dip_switches_4bits";
   xlnx,edk-iptype = "PERIPHERAL";
   xlnx,dout-default-2 = <0x0>;
   status = "okay";
   xlnx,gpio2-width = <4>;
   clock-names = "s_axi_aclk";
   xlnx,use-board-flow;
   xlnx,tri-default = <0xffffffff>;
   xlnx,name = "axi_gpio_1";
   xlnx,all-inputs = <0>;
  };
  axi_gpio_2: gpio@40020000 {
   #interrupt-cells = <2>;
   interrupts = < 3 2 >;
   xlnx,gpio-board-interface = "Custom";
   compatible = "xlnx,axi-gpio-2.0" , "xlnx,xps-gpio-1.00.a";
   xlnx,all-outputs = <0>;
   #gpio-cells = <2>;
   xlnx,gpio-width = <32>;
   clock-frequency = <81247969>;
   interrupt-parent = <&axi_intc_0>;
   xlnx,dout-default = <0x0>;
   xlnx,is-dual = <1>;
   xlnx,ip-name = "axi_gpio";
   xlnx,tri-default-2 = <0xffffffff>;
   reg = <0x40020000 0x10000>;
   xlnx,all-inputs-2 = <0>;
   clocks = <&clk_bus_0>;
   xlnx,all-outputs-2 = <0>;
   gpio-controller;
   xlnx,interrupt-present = <1>;
   xlnx,gpio2-board-interface = "Custom";
   xlnx,edk-iptype = "PERIPHERAL";
   xlnx,dout-default-2 = <0x0>;
   status = "okay";
   xlnx,gpio2-width = <32>;
   clock-names = "s_axi_aclk";
   interrupt-controller;
   interrupt-names = "ip2intc_irpt";
   xlnx,tri-default = <0xffffffff>;
   xlnx,name = "axi_gpio_2";
   xlnx,all-inputs = <0>;
  };
  axi_quad_spi_0: axi_quad_spi@44a40000 {
   xlnx,select-xpm = <0>;
   compatible = "xlnx,axi-quad-spi-3.2" , "xlnx,xps-spi-2.00.a";
   xlnx,lsb-stup = <0>;
   xlnx,num-ss-bits = <0x1>;
   xlnx,hasfifos = <1>;
   xlnx,xip-mode = <0>;
   xlnx,use-startup-ext = <0>;
   xlnx,s-axi4-addr-width = <24>;
   xlnx,byte-level-interrupt-en = <0>;
   num-cs = <0x1>;
   xlnx,xip-perf-mode = <1>;
   xlnx,sck-ratio = <2>;
   xlnx,s-axi4-id-width = <4>;
   fifo-size = <16>;
   xlnx,multiples16 = <1>;
   xlnx,master-mode = <1>;
   xlnx,shared-startup = <0>;
   xlnx,ip-name = "axi_quad_spi";
   xlnx,qspi-board-interface = "qspi_flash";
   reg = <0x44a40000 0x10000>;
   xlnx,dual-quad-mode = <0>;
   xlnx,new-seq-en = <1>;
   bits-per-word = <8>;
   xlnx,num-transfer-bits = <8>;
   xlnx,spi-memory = <3>;
   xlnx,s-axi4-data-width = <32>;
   xlnx,edk-iptype = "PERIPHERAL";
   xlnx,slaveonly = <0>;
   xlnx,use-startup-int = <0>;
   xlnx,use-startup = <0>;
   xlnx,type-of-axi4-interface = <0>;
   xlnx,async-clk = <1>;
   xlnx,spi-mode = <2>;
   xlnx,sck-ratio1 = <1>;
   status = "okay";
   xlnx,fifo-depth = <16>;
   xlnx,use-board-flow;
   xlnx,uc-family = <0>;
   xlnx,spi-mem-addr-bits = <24>;
   xlnx,axi-interface = <0>;
   xlnx,Axi4-address = <0>;
   xlnx,fifo-included = <1>;
   xlnx,sub-family = "artix7";
   xlnx,name = "axi_quad_spi_0";
  };
  axi_timer_0: timer@41c00000 {
   interrupts = < 1 2 >;
   compatible = "xlnx,axi-timer-2.0" , "xlnx,xps-timer-1.00.a";
   xlnx,gen1-assert = <1>;
   clock-frequency = <81247969>;
   xlnx,trig0-assert = <1>;
   interrupt-parent = <&axi_intc_0>;
   xlnx,count-width = <32>;
   xlnx,ip-name = "axi_timer";
   xlnx,one-timer-only = <0>;
   reg = <0x41c00000 0x10000>;
   clocks = <&clk_bus_0>;
   xlnx,gen0-assert = <1>;
   xlnx,mode-64bit = <0>;
   xlnx,edk-iptype = "PERIPHERAL";
   status = "okay";
   xlnx,trig1-assert = <1>;
   xlnx,enable-timer2 = <1>;
   interrupt-names = "interrupt";
   xlnx,name = "axi_timer_0";
  };
  axi_uartlite_0: serial@40600000 {
   interrupts = < 0 0 >;
   compatible = "xlnx,axi-uartlite-2.0" , "xlnx,xps-uartlite-1.00.a";
   clock-frequency = <81247969>;
   xlnx,uartlite-board-interface = "usb_uart";
   xlnx,s-axi-aclk-freq-hz-d = <0x4d7bee1>;
   interrupt-parent = <&axi_intc_0>;
   xlnx,ip-name = "axi_uartlite";
   reg = <0x40600000 0x10000>;
   xlnx,baudrate = <115200>;
   clocks = <&clk_bus_0>;
   current-speed = <115200>;
   xlnx,use-parity = <0>;
   xlnx,edk-iptype = "PERIPHERAL";
   xlnx,odd-parity = <0>;
   status = "okay";
   xlnx,use-board-flow;
   interrupt-names = "interrupt";
   xlnx,name = "axi_uartlite_0";
   xlnx,data-bits = <8>;
   xlnx,parity = "No_Parity";
  };
  microblaze_0_local_memory_dlmb_bram_if_cntlr: lmb_bram_if_cntlr@0 {
   xlnx,edk-special = "BRAM_CTRL";
   xlnx,write-access = <2>;
   compatible = "xlnx,lmb-bram-if-cntlr-4.0" , "xlnx,axi-bram-ctrl";
   xlnx,ecc-onoff-register = <0>;
   xlnx,ecc-onoff-reset-value = <1>;
   xlnx,s-axi-ctrl-protocol = "AXI4LITE";
   xlnx,mask = <0xc0000000>;
   xlnx,mask1 = <0x800000>;
   xlnx,mask2 = <0x800000>;
   xlnx,fault-inject = <0>;
   xlnx,mask3 = <0x800000>;
   xlnx,ip-name = "lmb_bram_if_cntlr";
   xlnx,arbitration = <0>;
   xlnx,num-lmb = <1>;
   xlnx,mask4 = <0x800000>;
   reg = <0x00000000 0x20000>;
   xlnx,s-axi-ctrl-addr-width = <32>;
   xlnx,mask5 = <0x800000>;
   xlnx,ecc-status-registers = <0>;
   xlnx,mask6 = <0x800000>;
   xlnx,lmb-protocol = <0>;
   xlnx,ce-counter-width = <0>;
   xlnx,mask7 = <0x800000>;
   xlnx,ecc = <0>;
   xlnx,edk-iptype = "PERIPHERAL";
   xlnx,lmb-dwidth = <32>;
   xlnx,interconnect = <0>;
   xlnx,ce-failing-registers = <0>;
   xlnx,ue-failing-registers = <0>;
   status = "okay";
   xlnx,data-width = <32>;
   xlnx,s-axi-ctrl-data-width = <32>;
   xlnx,bram-awidth = <32>;
   xlnx,lmb-awidth = <32>;
   xlnx,name = "microblaze_0_local_memory_dlmb_bram_if_cntlr";
  };
  microblaze_0_local_memory_ilmb_bram_if_cntlr: lmb_bram_if_cntlr@1 {
   xlnx,edk-special = "BRAM_CTRL";
   xlnx,write-access = <2>;
   compatible = "xlnx,lmb-bram-if-cntlr-4.0" , "xlnx,axi-bram-ctrl";
   xlnx,ecc-onoff-register = <0>;
   xlnx,ecc-onoff-reset-value = <1>;
   xlnx,s-axi-ctrl-protocol = "AXI4LITE";
   xlnx,mask = <0xc0000000>;
   xlnx,mask1 = <0x800000>;
   xlnx,mask2 = <0x800000>;
   xlnx,fault-inject = <0>;
   xlnx,mask3 = <0x800000>;
   xlnx,ip-name = "lmb_bram_if_cntlr";
   xlnx,arbitration = <0>;
   xlnx,num-lmb = <1>;
   xlnx,mask4 = <0x800000>;
   reg = <0x00000000 0x20000>;
   xlnx,s-axi-ctrl-addr-width = <32>;
   xlnx,mask5 = <0x800000>;
   xlnx,ecc-status-registers = <0>;
   xlnx,mask6 = <0x800000>;
   xlnx,lmb-protocol = <0>;
   xlnx,ce-counter-width = <0>;
   xlnx,mask7 = <0x800000>;
   xlnx,ecc = <0>;
   xlnx,edk-iptype = "PERIPHERAL";
   xlnx,lmb-dwidth = <32>;
   xlnx,interconnect = <0>;
   xlnx,ce-failing-registers = <0>;
   xlnx,ue-failing-registers = <0>;
   status = "okay";
   xlnx,s-axi-ctrl-data-width = <32>;
   xlnx,bram-awidth = <32>;
   xlnx,lmb-awidth = <32>;
   xlnx,name = "microblaze_0_local_memory_ilmb_bram_if_cntlr";
  };
 };
};
# 3 "/mnt/Rogue/Projects/Vivado/ES2025/Labs/lab8_bsp/hw/sdt/system-top.dts" 2
/ {
 board = "arty-a7-100";
 compatible = "xlnx,arty-a7-100";
 device_id = "7a100t";
 #address-cells = <1>;
 #size-cells = <1>;
 slrcount = <1>;
 family = "microblaze";
 speed_grade = "1";
 microblaze_0_local_memory_dlmb_bram_if_cntlr_memory: memory@0 {
  compatible = "xlnx,lmb-bram-if-cntlr-4.0";
  xlnx,ip-name = "lmb_bram_if_cntlr";
  device_type = "memory";
  memory_type = "memory";
  reg = <0x00000000 0x20000>;
 };
 mig_7series_0_memory: memory@80000000 {
  compatible = "xlnx,mig-7series-4.2";
  xlnx,ip-name = "mig_7series";
  device_type = "memory";
  memory_type = "memory";
  reg = <0x0 0x80000000 0x0 0x10000000>;
 };
 chosen {
  stdout-path = "serial0:115200n8";
 };
 aliases {
  serial0 = &axi_uartlite_0;
  spi0 = &axi_quad_spi_0;
 };
 cpus_microblaze_0: cpus_microblaze@0 {
  address-map = <0x00000000 &microblaze_0_local_memory_dlmb_bram_if_cntlr_memory 0x00000000 0x20000>,
         <0x00000000 &microblaze_0_local_memory_dlmb_bram_if_cntlr 0x00000000 0x20000>,
         <0x80000000 &mig_7series_0_memory 0x80000000 0x10000000>,
         <0x40000000 &axi_gpio_0 0x40000000 0x10000>,
         <0x40010000 &axi_gpio_1 0x40010000 0x10000>,
         <0x40020000 &axi_gpio_2 0x40020000 0x10000>,
         <0x40600000 &axi_uartlite_0 0x40600000 0x10000>,
         <0x41200000 &axi_intc_0 0x41200000 0x10000>,
         <0x41c00000 &axi_timer_0 0x41c00000 0x10000>,
         <0x44a00000 &Pmod_DHB1_0 0x44a00000 0x10000>,
         <0x44a30000 &Pmod_Dual_MAXSONAR_0 0x44a30000 0x10000>,
         <0x44a40000 &axi_quad_spi_0 0x44a40000 0x10000>;
  #ranges-address-cells = <0x1>;
  #ranges-size-cells = <0x1>;
 };
};
